The present invention relates to an output driver for a semiconductor device. In many applications, semiconductor devices generate output signals for use by peripheral devices. It is generally desirable to have a stable transition of these signals from a logic low state to a logic high state and vice versa.
The rate of this transition is called the slew rate and is usually measured as the change in voltage over time (V/time). In current high speed applications, the slew rate is typically around 2, 3 or 4 V/ns in order of magnitude. Often these numbers are specified with a narrow tolerance because transitions that occur too quickly can cause crosstalk with neighbouring signals, while transitions that occur too slowly can cause inter symbol interference. Both effects can cause data dependent jitter and therefore a reduction of the data eye.
Achieving of a stable slew rate in view of process, voltage, and temperature (PVT) variations is important if an integrated circuit, for instance, has to fulfill the specifications. The specifications may be defined within system or product data sheets or the like. Due to PVT variations the slew rate of an output signal could vary, thus a suitable technique to cope with such variations is needed.